FIG. 1 (Prior Art) is a diagram of a USB device 1 (in this example, a cellular telephone) that is connected by a USB cable 2 to a USB host 3 (in this example, a personal computer). USB host 3 includes USB circuitry 4. USB device 1 includes USB circuitry 5. USB cable 2 has a standard USB plug 6 that plugs into an accommodating USB port 7 on USB host 3 so that the USB host can read from, and write to, the USB circuitry 5 in USB device 1 over two data lines D+ and D− in USB cable 2. USB cable 2 also provides a supply voltage power conductor VIN as well as a ground conductor GND. These conductors are usable to power circuitry that is external to USB host 3. The USB port 7 is specified to supply 5.0 volts between its conductors VIN and GND, but the USB host may, depending on the configuration, either supply a maximum of 100 milliamperes of supply current or a maximum of 500 milliamperes of supply current.
In the illustrated system, USB host 3 and USB port 7 are used to recharge a rechargeable lithium-ion battery 8 in cellular telephone 1. Accordingly, cellular telephone 1 includes a battery charger integrated circuit 9 that is coupled to USB circuitry 5. Battery charger integrated circuit 9 is also coupled to the conductors VIN and GND in USB cable 2 as illustrated. The charger integrated circuit 9 receives power from the USB cable via the supply voltage conductor VIN and the ground conductor GND, and in turn uses that power to recharge battery 8.
FIG. 2 illustrates the manner of charging. In a first fast charge phase, the battery charger integrated circuit 9 charges battery 8 with a constant current I-CONST. Then, once the battery voltage VBATT reaches a predetermined voltage V-CONST, the battery charger integrated circuit 9 switches to a constant voltage charging mode. This constant voltage mode is sometimes referred to as the “top off” phase. After charger integrated circuit 9 has transferred energy into the battery in this constant voltage charging mode such that the battery voltage VBATT has remained in a predetermined charged range for a predetermined amount of time, the battery charger integrated circuit 9 stops supplying energy to battery 8. This is illustrated by the vertical line 13 in FIG. 2.
As set forth above, USB port 7 may only be able to supply a current of 100 milliamperes of supply current, or USB port 7 may be able to supply a current of 500 milliamperes of supply current. It is desired to charge battery 8 with a higher constant current during the fast charge phase if the USB port is able to supply the increased amount of charge current. Accordingly, charger integrated circuit 9 charges during the constant current phase at 500 milliamperes if USB port 7 is able to supply 500 milliamperes of supply current across the VIN and GND conductors. USB circuitry 4 in USB host 3 writes information into the USB circuitry 5 in the cellular telephone 1 that indicates the amount of supply current that the host can output onto its USB port 7. USB circuitry 5 in turn supplies this information to the battery charger integrated circuit 9 in the form of a digital logic signal. If USB circuitry 5 drives the digital logic signal to have a first digital logic value, then the supply current has a first maximum amount (for example, 100 milliamperes), whereas if the USB circuitry 5 drives the signal to have a second digital logic value, then the supply current has a second maximum amount (for example, 500 milliamperes). Battery charger integrated circuit 9 receives this signal on a first terminal (T1) 11.
USB host 3 (in this case, the personal computer) in the present example can also enable and disable battery charging. USB circuitry 4 in USB host 3 writes a bit of information into USB circuitry 5 in cellular telephone 1. This bit of information indicates whether the charger is to be enabled or disabled. This bit of information is then passed from USB circuitry 5 to the battery charger integrated circuit 9 in the form of a second digital logic signal. The battery charger integrated circuit 9 receives this second digital logic signal on a second terminal (T2) 12. The battery charger integrated circuit 9 therefore has two terminals 11 and 12 for receiving configuration information from USB circuitry 5.
FIG. 3 illustrates the digital logic values of the first and second digital logic signals on terminals T1 and T2, and shows the corresponding way the battery charger integrated circuit 9 is configured. In a variation on the conventional USB battery charging circuit of FIG. 1, an additional external resistor may be coupled between the first terminal T1 and ground potential. The resistance of this external resistor sets a magnitude of the constant current with which the battery charger integrated circuit 9 charges battery 8 in the constant current mode in some configurations. For example, if the signal received on terminal T2 is a digital logic low, then the charger is disabled, otherwise the charger charges in accordance with FIG. 2 using a constant current in the fast charge phase, where the constant current is determined by the resistance of the external resistor coupled to terminal T1. Terminal T1 may or may not, depending on the specific conventional circuit, also be coupled to a terminal on the USB circuit 5. Improvements to the above-described conventional battery charging systems are desired.